LifeLine for FPGA Protection: Obfuscated Cryptography for Real-World Security


Konferenz / Medium


Simon Klix Aiden Gula Florian Stolz Nils Albartus Julian Speith Clemens Nasenberg Marc Fyrbiak Christof Paar Russell Tessier Tim Güneysu

Research Hub

Research Hub B: Eingebettete Sicherheit

Research Challenges

RC 6: Next-Generation Implementation Security


Over the last decade attacks have repetitively demonstrated that bitstream protection for SRAM-based FPGAs is a persistent problem without a satisfying solution in practice. Hence, real-world hardware designs are prone to intellectual property infringement and malicious manipulation as they are not adequately protected against reverse-engineering. In this work, we first review state-of-the-art solutions from industry and academia and demonstrate their ineffectiveness with respect to reverse-engineering and design manipulation. We then describe the design and implementation of novel hardware obfuscation primitives based on the intrinsic structure of FPGAs. Based on our primitives, we design and implement LifeLine, a hardware design protection mechanism for FPGAs using hardware/software co-obfuscated cryptography. We show that LifeLine offers effective protection for a real-world adversary model, requires minimal integration effort for hardware designers, and retrofits to already deployed (and so far vulnerable) systems.


Hardware Implementation
Hardware Reverse Engineering
FPGA Security