Thorben Moos
Institution: CASA – Cyber Security in the Age of Large-Scale Adversaries
E-Mail: Thorben.Moos@rub.de
Adresse: ID 2/621
Publikationen:
The SPEEDY Family of Block Ciphers - Engineering an Ultra Low-Latency Cipher from Gate Level for Secure Processor Architectures PRINCEv2 - More Security for (Almost) No Overhead Red Team vs. Blue Team: A Real-World Hardware Trojan Detection Case Study Across Four Modern CMOS Technology Generations Beware of Insufficient Redundancy: An Experimental Evaluation of Code-based FI Countermeasures Static Power SCA of Sub-100 nm CMOS ASICs and the Insecurity of Masking Schemes in Low-Noise Environments Glitch-Resistant Masking Revisited Exploring the Effect of Device Aging on Static Power Analysis Attacks The Risk of Outsourcing: Hidden SCA Trojans in Third-Party IP-Cores Threaten Cryptographic ICs Countermeasures against Static Power Attacks – Comparing Exhaustive Logic Balancing and Other Protection Schemes in 28 nm CMOS DL-LA: Deep Learning Leakage Assessment - A modern roadmap for SCA evaluations Let’s Take it Offline: Boosting Brute-Force Attacks on iPhone’s User Authentication through SCA Unrolled Cryptography on Silicon - A Physical Security Analysis Static Power Side-Channel Analysis – An Investigation of Measurement Factors Side-Channel Hardware Trojan for Provably-Secure SCA-Protected Implementations
