Maik Ender
Institution: Ruhr-Universität Bochum
E-Mail: maik.ender@rub.de
Twitter: @MaikEnderEU
Publications:
Silicon Heist: (Ransom) Attacks for Cloud FPGAs via Privilege Escalation Leakback CRC: Optical Plaintext Recovery of Encrypted Bitstreams on AMD 7-Series FPGAs JustSTART: How to Find an RSA Authentication Bypass on Xilinx UltraScale(+) with Fuzzing How Not to Protect Your IP - An Industry-Wide Break of IEEE 1735 Implementations A Cautionary Note on Protecting Xilinx' UltraScale(+) Bitstream Encryption and Authentication Engine The Unpatchable Silicon: A Full Break of the Bitstream Encryption of Xilinx 7-Series FPGAs
